1. Field of the Invention
The present invention relates to tri-state bus drivers used to drive lines on high speed buses; and more particularly to tri-state CMOS drivers which allow different devices to drive the bus on successive data transfer cycles without device contention.
2. Description of Related Art
High speed buses having lines which allow multiple users to drive the line can be termed bi-directional. Several problems are encountered when standard tri-statable CMOS drivers are used to drive bi-directional lines on such buses. One significant problem is caused by imperfect synchronization of the multiple drivers attached to the bus. If there is any overlap between the time one driver is turned off and another driver is turned on, there may be a very large current running between them. The effect of this contention for control of the state of the bus line is described with reference to FIG. 2 below.
The typical method used to eliminate the current spike is to put an off cycle between the times when the signals are driven by different drivers. Unfortunately, this method results in lost cycles. Lost cycles can be particularly painful when there are a lot of small burst transfers from random channels on the bus.
Another way in which the current spike can be reduced is by going with open drain outputs which are tied together and attached to a pull up resistor. In this situation, there is less problem with a change in current since the current is about the same whether one device or two devices are driving the line. The downside of this method is that the only way for a signal to rise is through the pull up resistor. This creates a troublesome tradeoff for high speed buses. That is, small resistors are required to achieve fast rise times. However, small resistors result in an increase in DC current.
Accordingly, it is desirable to provide a high speed, tri-state bus having bi-directional lines which do not suffer the cycle time delay or high current device contention of prior art designs during bus reversal.